FIELD EFFECT TRANSISTOR (FET):

The field effect transistor is a three terminal uni-polar semiconductor device,
in which current is controlled by an electric field. Current conduction is only by
majority carriers.

Based on the construction, the FET can be classified into two types as

1.Junction FET and

2.Metal Oxide Semiconductor FET

Advantage of FET over the conventional transistor:
The  FET  is  a  unipolar  device  depending  only  upon  majority  carriers.  The
conventional transistor is a bipolar device.

FET has high input resistance, in the order of 100M  for JFET and 1010 to 1015
for MOSFET. Thus FET is a voltage controlled device.

FET is less noisy than a tube or bipolar transistor.

Disadvantages of FET over conventional transistor:

Transconductance  is  low  and  hence  the  voltage  gain  is  low.  In  case  of
transistor, transconductance is high, so the voltage gain is high.

They are more costly than junction transistors.

FET has relatively small gain band width product.


OPERATION OF N-CHANNEL FET:



The operation of N channel FET can be understood with the help of the

figure shown below:

Let us first suppose that the gate has been reverse-biased by a gate battery
VGG and the drain battery VDD is not connected.

We know that there exists a space charge region on either side of a reverse
biased  P-N  junction.  Now  space  charge  region  or  depletion  layers  located
symmetrically about the gates are formed.

Further consider the  effect  of drain  battery  VDD while VGG is  removed.  The
voltage VDD is dropped across the N channel resistance giving rise to a drain
current         ID = VDD / RDS.

Due to this current flow there will be a uniform voltage drop while going from
drain to source.  Consider two points A and B in N channel.

Let VA and VB be potential drop at these points. Certainly VA > VB. so due to
the  progressive  voltage  drop  along  the  length  of  the  channel,  the  reverse
biasing effect of PN junction is stronger near drain than near source.

Due to this reason, the penetration of depletion region A is more than at B.
this explains that is why depletion region extend farther into the channel at A
than at point B when both VDD and VGG are applied.


Let  no  potential  be  applied  between  gate  and  source  (VGS  =  0)  and  a potential VDD is applied between drain and source.

Now a current ID flows from drain to source, which is maximum because the
channel is widest. Let the gate be reverse biased by applying a voltage VGG
between gate and source.

This gate bias increases the depletion region and thereby decreases the cross
section  of  N  channel.  Since  there  is no  current carrier  available  in  depletion
region,  its conductivity is zero.

Due  to  the  decrease  of  cross  sectional  of  N  channel,  the  drain  current
decreases. When gate bias is increased further, a stage is reached when two
depletion regions touch each other and the ID becomes zero.

So  according  to  a  fixed  drain  to  source  voltage,  the  ID  is  a  function  of
reverse  bias  voltage  at  gate. Since  negative  gate  voltage  controls  the  drain
current, FET is called a voltage-controlled device.

When a varying signal voltage is applied in series with the gate voltage, the
resulting variation in drain current causes a similar though amplified voltage
variation, across the load resistance connected in drain circuit.
Static characteristics of FET: