Comprehensive coverage of the challenges IC designers face, the most significant technologies produced by providers of EDA (electronic design automation) tools and IP (intellectual property) cores, and the design methodologies other IC designers are using to become successful.
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Celebrating engineering: EDN names 2010 Innovation Award winners
EDN Staff, May 3, 2011EDN bestows its 21st annual Innovation Awards, honoring a diverse group of electronics engineers and the ground-breaking products they have produced. More -
DSPs power the race to 4G
Mike Demler, Technical Editor, April 21, 2011Next-generation base stations speed mobile connectivity with SDRs, hard-coded accelerators, and multicore CPUs. More -
3-D ICs stack up design challenges
By Ron Wilson, Editorial director, April 14, 2011Mentor Graphics Chairman and CEO Walden Rhines outlines the likely evolutionary stages of 3-D IC development, from today's relatively simple stacked dice to a distant future of design in a homogeneous 3-D space. Along that path Rhines identifies several points of interest. More -
FPGAs support real-time video over IP for broadcast TV applications
Mike Demler, Technical Editor, April 12, 2011Xilinx has updated its Real-Time Video Engine TDP with the release of an SMPTE 2022 IP core. More -
ARM versus Intel: a successful stratagem for RISC or grist for CISC's tricks?
Brian Dipert, Senior Technical Editor, April 7, 2011ARM and its licensees are striving to expand their overall market presence by tackling Intel’s x86 in servers and client desktop and laptop computers. Intel has responded by attacking ARM on its own turf: handsets, tablets, and the like. More -
The 3-D IC and you
Ron Wilson, Editorial Director, April 7, 2011All the talk seems to be about the 3-D IC, but does it amount to anything? More -
Innovative circuit designs target performance improvement and differentiation
Eugene R Bukowski, Jr, Accenture, April 7, 2011Product innovation is the path to product rejuvenation. A holistic approach compels designers to consider innovation at all architectural levels. Product designers and ASIC designers can together achieve innovation breakthroughs. More -
Complete IC simulation requires a full toolbox of hardware and software
Mike Demler, Technical Editor, March 17, 2011Combining faster solvers with test benches that link analog to digital to system-level models prevents design errors. More -
FPGA-reference-design kit eases HDR-video-surveillance-camera development
Lattice Semiconductor’s new HDR-60, a high-definition video-camera-development system employs the LatticeECP3 FPGA family. More
Mike Demler, Technical Editor, March 17, 2011 -
Dual ARM Cortex-A9 MPCore features 28-nm, low-power programmable logic for high-end embedded systems
Mike Demler, Technical Editor, March 17, 2011The Zynq-7000 family of EPP devices target high-end embedded-system applications. More
- Why write about networking ICs?
Ron Wilson, Editorial Director, March 17, 2011Some technologies are dead ends, and others are fingerposts pointing to the future. More
- Acid test
David R Bryce, Electronics Engineer, March 17, 2011Figuring out the reason behind an increase in warranty claims on a redesigned product gives one engineer a new appreciation for chemistry and a renewed dedication to multidisciplinary design reviews. More
- CPUs in FPGAs: many faces to a trend
Ron Wilson, Editorial Director, March 3, 2011Whether as synthesizable soft cores or hard cores on the die, CPUs are showing up in more FPGA designs, bringing with them important challenges for designers. More
- Build accurate Spice models for low-noise, low-power precision amplifiers
Understand Spice-model construction to appreciate ac and dc performance. More
Don LaFontaine, Intersil, March 3, 2011
- Design provides single-port-to-dual-port SDRAM converter
Yu-Chieh Chen, Instrument Technology Research Center, National Applied Research Laboratories, Hsinchu, Taiwan; Edited by Martin Rowe and Fran Granville, March 3, 2011Read and write operations won't interfere with each other. More
- Zener diode protects FPGA inputs
Rick Collins, Arius, Frederick, MD; Edited by Martin Rowe and Fran Granville, March 3, 2011In a pinch, a Zener diode can save time and prevent a board redesign. More
- Rambus takes the measure of the transceiver market
By Ron Wilson, Editorial director, March 1, 2011In today's world, just being fast isn't necessarily the winning formula. More
- Advancing on 20nm: conversation with ST's Philippe Magarshack
Ron Wilson, Editorial Director, February 24, 2011ST is at 28 headed for 20nm on the Common Platform roadmap, but at this level no step comes easy. More
- The Nexus One: Google hits a smartphone home run
Brian Dipert, Senior Technical Editor, February 17, 2011More than a year after its unveiling, the Nexus One remains a leading-edge product, and represents a substantial leap in capability beyond the T-Mobile G1. More
- Fully depleted SOI shows its stuff in CPU design
By Ron Wilson, Editorial director, February 10, 2011An ARM Cortex M0 paper design suggest that FDSOI could be a strong contender at 20 nm. More
- Lowering the cost of medical-imaging R&D
Allan Evans, Samplify Systems Inc, February 3, 2011Medical-equipment companies are shifting from a vertical-integration model to a system-integration model to do more with less research and development. More
- Compute a histogram in an FPGA with one clock
Mohit Kumar, Texas Instruments, Bangalore, India; Edited by Martin Rowe and Fran Granville, February 3, 2011Use a histogram to analyze large amounts of data. More
- Verifying complex clock and reset regimes in modern chips: the challenge and scalable solutions
Pranav Ashar and Vishnu Vimjam, Real Intent Inc, January 24, 2011Automation at every step and built-in tool intelligence offer the only practical path to scalable verification of modern chips. More
- Hardware-based virtualization eases design with multicore processors
Satish Sathe, AppliedMicro, January 20, 2011Offloading queue and traffic management to hardware reduces design complexity, improves application efficiency, and maximizes performance. More
- Collaboration leads to the clouds at Common Platform panel
By Ron Wilson, Editorial director, January 19, 2011A panel on IC design collaboration at the Common Platform Technology forum aimed to sort out how we can achieve successful design collaboration across teams, company firewalls, and national boundaries. The result was a collaboration itself, in which panelists shared perceptions, experiences, and a new way of looking at the design process. More
- EDA execs prognosticate on 2011
By Ron Wilson, Editorial director, January 7, 2011Rather than seeing the impenetrable gloom of 2009 or the explosive rebound of 2010, the four EDA industry pundits present saw a middle road: moderating growth and, behind the scenes, profound change. More
- IC vendors seek green applications
Rick Nelson, Editor-in-Chief, January 6, 2011With devices ranging from DSPs to Hall-effect sensors, semiconductor manufacturers are looking to improve efficiency in applications ranging from telecommunications to automotive electronics. More
- Xilinx adds FPGA-DSP-development kits
Mike Demler, Technical Editor, January 6, 2011Xilinx based the Virtex-6 FPGA DSP-development kit on the LX240T FPGA. It targets high-performance signal-processing applications, such as aerospace and defense, medical technology, high-performance computing, and next-generation wireless communications. More
- Critical false-path analysis through sensitization methods
Shruti Rakheja and Neha Mathur, Freescale Semiconductor, December 29, 2010Static and dynamic false-path determination is essential for accurate application of false paths in an SOC design. More
- EDN Hot 100 products
December 15, 2010EDN proudly presents its list of the Hot 100 products that in 2010 heated up the electronics world and grabbed the attention of our editors and our readers. More
- Why modems are going soft
Pascal Herczog, Cognovo Ltd, December 6, 2010A new approach to modem development separates the modem-specific software from the hardware and, therefore, has a profound impact on the platform design flow. More
- Mentor Graphics acquires open source developer
By Mike Demler, Technical editor, December 6, 2010Mentor Graphics adds to its suite of tools for embedded software development with the acquisition of certain assets of CodeSourcery Inc, a provider of open source GNU-based tool chains and services for advanced systems development. More
- Use GPUs to boost acceleration
Graham Prophet, Editor, EDN Europe, December 2, 2010No longer just for games, graphics-processing units can speed design and simulation programs and, ultimately, the code in your embedded systems. More
- Kaufman Award winner Pat Pistilli: DAC and the birth of the EDA industry
Interview conducted and edited by Mike Demler, Technical Editor, December 2, 2010Pat Pistilli shares his perspective on the evolution of DAC and EDA. More
- SOC-PLL design requires trade-offs
Jeff Galloway and Randy Caplan, Silicon Creations, December 2, 2010Your decision to use an LC- or a ring-based PLL depends on the application. More
- Lattice MachXO2 family reduces power and cost for low-density PLD designs
Mike Demler, Technical Editor, November 18, 2010More
- University of New Mexico claims Intel infringes double-patterning litho patent
By Suzanne Deffree, Managing editor, news, November 16, 2010Following similar suits the university has filed against TSMC, Samsung, and Toshiba, the University of New Mexico's technology-transfer arm is claiming Intel is infringing its patent, "Method and Apparatus for Extending Spatial Frequencies in Photolithography Images." More
- Essential principles for practical analog BIST
Steve Sunter, Mentor Graphics, November 4, 2010Practical analog BIST has the potential to reduce IC-test costs and time to market. More
- Understanding system-level energy-management techniques and test
Gina Bonini, Tektronix, October 21, 2010Review test examples of system-level energy-management design techniques for PCIe and low-power DDR memory. More
- ECO-friendly standard-cell design with a dual purpose
Sumeet Aggarwal, Freescale Semiconductor Inc, October 18, 2010Inexpensively change the structure of standard cells in order to use them as capacitors on the original silicon. More
- Atrenta plans Grenoble R&D center
By Suzanne Deffree, Managing editor, news, October 18, 2010San Jose-based Atrenta's new R&D center will focus on advanced power reduction and 3D design. More
- Building a better memory controller: architectural performance exploration of an AXI memory controller
Laurent Isenegger, CoFluent Design, October 15, 2010Early design-space and architecture exploration is critical for memory-controller design. More
- Asia/Pacific EDA revenue up 41.7%, EDAC Q2 data shows
By Suzanne Deffree, Managing editor, news, October 12, 2010Japan is the only consuming region to show a year-over-year sales decreases for the June quarter, according to data from the EDA Consortium. More
- ARM, SMIC extend IP relationship to 65-, 40-nm LL
By Suzanne Deffree, Managing editor, news, October 11, 2010The agreement will provide free access on the ARM DesignStart online IP access portal to library suites of 9-track and 12-track multi-Vt logic libraries, power management kits, ECO kits, and ARM high density optimized memory compilers. More
- Managing multiple bit-stream images for remote system update
Neil G. Jacobson, Formidable Engineering Consultants, October 6, 2010Techniques are available for managing multiple bit-stream images and safely updating them in the field. More
- TSMC supports soft IP
By Suzanne Deffree, Managing editor, news, October 5, 2010TSMC is working with EDA and IP (intellectual property) companies to incorporate a soft IP program into its IP Alliance. More
- Microsemi to acquire Actel
Rick Nelson, Chief Editor, October 4, 2010Microsemi Corp announced that it has entered into a definitive agreement to acquire Actel Corp for $20.88 per share through a cash tender offer. More
- Kapsch TrafficCom adopts CAST JPEG IP core
Rick Nelson, Chief Editor, September 10, 2010Kapsch TrafficCom has incorporated the JPEG Encoder IP Core from CAST Inc in its Vehicle Detection and Registration (VDR) Sensor system, which captures moving traffic images. More
- Xilinx targets real-time 3D TV
Rick Nelson, Chief Editor, September 10, 2010Xilinx Inc has announced a new development platform for engineers working to meet the growing demand for 3D TV broadcast and other high definition video applications. More
- Vendors target oscilloscope sweet spot
Rick Nelson, Editor-in-Chief, September 9, 2010When choosing oscilloscopes in the 1- to 4-GHz range, engineers have an expanding variety of price, performance, and usability options as the market acquires a new competitor. More
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