PC PROTOTYPE CARD part-2

C. I/O MAP


 
IBM PC computer mapped its I/O by used address decoder. There are 400 Hex I/O address locations preserved. Some have been used for its own purpose and some used by the external cards and some are still not been use yet. Tabel A-1. show some of these I/O address used for. In fact, I/O address locations can be as much as 220 locations. But in the previous design it is not used all the address lines. Only 10 lines were used, i.e.: 210 = 1024 locations (400 Hex). If you run out these locations all, there is still way to get some of the locations by used the decoder techniques or by used indexed I/O map. This will be describe later.

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ADDRESS DEVICE

S




Y




S




T




E




M



 
 

B




O




A




R




D



 
 

 I




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O



000H ~ 01FH DMA Controller 1, 8237A-5
020H ~ 03FH Interrupt Controller 1, 8259A, Master
040H ~ 05FH Timer, 8254-2
060H ~ 06FH Keyboard Controller, 8254
070H ~ 07FH Real Time Clock, NMI (Non Maskable Interrupt) Mask
080H ~ 09FH DMA (Direct Memory access) page register, 74LS612
0A0H ~ 0BFH Interrupt Controller 2, 8259A
0C0H ~ 0DFH DMA Controller 2, 8237A-5
0F0H Clear Math Co-Processor busy
0F1H Reset Math Co-Processor
0F8H ~ 0FFH Math Co-Processor
1F0H ~ 1F8H Fixed Disk Controller

E




X




P




A




N




S




I




O




N



 
 

C




H




A




N




N




E




L



 
 

I




/




O



200H ~ 207H Game I/O Controller
210H ~ 217H Expansion Slot
220H ~ 24FH Reserved
278H ~ 27FH Parallel Printer Port 3 (LPT-3)
2E8H ~ 2EFH Serial Port 4 (COM-4)
2F0H ~ 2F7H Reserved
2F8H ~ 2FFH Serial Port 2 (COM-2)
300H ~ 31FH Prototype Card
320H ~ 32FH Fixed Disk Controller
360H ~ 36FH Reserved
378H ~ 37FH Parallel Printer Port 2 (LPT-2)
380H ~ 38FH SDLC, Bisynchronous 2
3A0H ~ 3AFH Bisynchronous 1
3B0H ~ 3BBH Monochrome Display Adapter
3BCH ~ 3BFH Parallel Printer Port 1 (LPT-1)
3C0H ~ 3CFH EGA/VGA Adapter Controller
3D0H ~ 3DFH Color/Graphics Monitor Adapter (CGA Adapter)
3E8H ~ 3EFH Serial Port 3 (COM-3)
3F0H ~ 3F7H Floppy Disk (Diskette) Controller
3F8H ~ 3FFH Serial Port 1 (COM-1)
Tabel A-1. I/O map for AT computer.
As we can see from the tabel, I/O port in the PC divided in 2 section, i.e.: direct addressing mode (0 ~ FFH port) are used for system I/O purpose, and indirect mode used by another peripheral which connected to the I/O slots.

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The first decision that has to be made when designing a PC prototype card is just where in the input/output map it should be placed. As explained previously, only 1024 of the 65536 possible places for input/output addresses are availabel on a PC, and the lower 512 addresses are reserved for the computer's internal hardware. Much of the upper block of 512 addresses are reserved for essential and standard expansion cards such as serial ports, and display adapters. We can only use the upper block of 512 addresses for our add-ons cards. There are still more places as mark by reserved that are not been used yet by any cards. We can use it. Even the prototype card has the location itself, it can't make a guarantee that these location are still reserved for our purpose, because many company had built their own card that used this location (include one that introduce by the IBM). Besides the standard card, there are many cards was introduced in the market this day, like video card (VCD or DVD card), TV card, radio card, etc ... etc. This also have several I/O locations that can be choose when installed in the first time. Be sure to check your configuration of I/O ports.

D. MEMORY MAP
 
In the first PC design of memory architecture, memories implemented to it's limit 1 MB boundary (220 as the address only 20 address lines). But not all of this location filled with memories. 216 location (640 kB) was fillled by RAM (Random Access Memory) for the system, program and temporary data. The upper portion was filled with ROM (Read Only Memory) by parts, depends of the configuration of the system; system initialization program, POST (Power On Self Test), BIOS (Basic Input/Output System), BASIC system, display controller, hard disk controller, etc ... etc. This upper portion location also called the UMB (Upper Memory Block) area. If we used DOS version 4.00 and up, we can activated this UMB area to store some portion of the system by put the 'DOS=UMB' statement in the CONFIG.SYS file. But the EMM386.EXE file must be installed first. This ability also valid for any other program if we use the 'LOADHIGH= . . .' statement.
Then the PC design architecture was developing the ability to expanded memory. This technique was development by Lotus-Intel-Microsoft, so become the standard EMS (Expanded Memory Specification) and also called LIM-EMS standard. The alocation method used UMB to map the expanded memory. 16 kB each block and called memory page. Up to 4 pages can be accesses at a time. We can used this option (or any programs which used this standard) by installed EMM386.EXE in the CONFIG.SYS file.
When the AT architecture was introduced, the limit of memory to implemented becomes more wide; 80286 CPU could be implemented up to 16 MB location (24 address lines) and 80386 CPU up to 4 GB (32 address lines). But because of the old design of DOS system, only 1 MB (20 address lines) can be accesses by DOS (DOS run in real mode). To accesses the upper 1 MB, DOS must run in protected mode. These upper 1 MB memory are called XMS (Extended Memory Specification) and can be accesses if we installed EMM386.EXE in the CONFIG.SYS  file too, or in the new system like windows system, it was used a DOS Extender program; DPMI, VCPM, etc ... etc. The first 64 kB memory location upper 1 MB memory also called HMA (High Memory Area). This location only for store the data not to execute the program. DOS also kept its data in it by the 'DOS=HI' statement. But the 'HIMEM.SYS' file must be installed first in the CONFIG.SYS file.
Fig. D-1. shows the memory map for the AT computer system. Its also included, memory location used by any programs and drivers, so we could see the whole system by hardware and software.
Fig. D-1. Memory Map of PC/XT/AT computer system.  
E. HARDWARE INTERRUPT
  
In the earlier PC design, only 1 PIC (Programmable Interrupt Controller) implemented, and in the new design, it was added 1 more (cascade). These hardware interrupts have the priority level. Tabel. E-1. shows the complete hardware interrupts and their priority level in PC system design.

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Hardware Int. No.





Desc. Master PIC





Desc. Slave PIC





Interrupt Vector Table No.





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IRQ 0 Timer Int. (8253 PIT channel 0)
  
INT 08H
IRQ 1 Keyboard Int. INT 09H
IRQ 2 Reserved (cascade), Clock Int. Slave PIC (see below) INT 0AH
IRQ 3 Serial Port 2 (COM-2)
   
INT 0BH
IRQ 4 Serial Port 1 (COM-1) INT 0CH
IRQ 5 Fixed Disk Controller Int. INT 0DH
IRQ 6 Floppy Disk Controller Int. INT 0EH
IRQ 7 Parallel Printer Port Int. INT 0FH
IRQ 8
   
Real Time Clock INT 70H

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IRQ 9 Software Redirect to IRQ2 INT 71H
IRQ 10 Reserved INT 72H
IRQ 11 Reserved INT 73H
IRQ 12 Reserved INT 74H
IRQ 13 Coprocessor INT 75H
IRQ 14 Fixed Disk Controller INT 76H
IRQ 15 Reserved INT 77H
Tabel. E-1. Hardware Interrupts Vector Tabel for AT Computer.

F. INTERRUPT VECTOR TABLE (IVT)
 
IVT is a table locate at 00000 hex. This table has 400 hex length. This table implemented on the Intel design architecture. In the begining, this location is to be used for the processor purpose, but in the PC design architecture the purpose is expanded. It's consist of a pair of pointer location; i.e.: CS:IP; where CS for code Segment and IP for Index Pointer. The size is 16 bit each. This pair of location consist of the routine program to do some task. The related function in the program is, location 00000 ~ 00003 hex used for INT 0, location 00004 ~ 00007 hex used for INT 1, and so on. The task for each interrupt is listed in Tabel. F-1. This table also a combined between hardware interrupt and software interrupt. We can also modified this interrupt to do some task for our purpose just by changing the interrupt pointer location not the whole routine.
 



INT. NO.

DESCRIPTION

INT. NO.

DESCRIPTION

INT 00 H

Division by Zero

INT 01 H

Single Stepping

INT 02 H

Non Maskable Interrupt

INT 03 H

Break Point

INT 04 H

Overflow (INTO)

INT 05 H

Print Screen

INT 06 H

Reserved

INT 07 H

Reserved

INT 08 H

Clock Tick (Hardware)

INT 09 H

Keyboard (Hardware)

INT 0A H

Reserved (Cascade PIC)

INT 0B H

COM-2 (Hardware)

INT 0C H

COM-1 (Hardware)

INT 0D H

Fixed Disk (Hardware)

INT 0E H

Floppy Disk  (Hardware)

INT 0F H

LPT (Hardware)

INT 10 H

Video (Display)

INT 11 H

Device List

INT 12 H

Memory Size (for PC/XT system)

INT 13 H

Disk Drive (Software)

INT 14 H

COM (Software)

INT 15 H

Cassette (for PC/XT system)

INT 16 H

Keyboard Input (Software)

INT 17 H

LPT (Software)

INT 18 H

ROM BASIC (for PC/XT system)

INT 19 H

Bootstrap Startup

INT 1 H

Time of Day (TOD)

INT 1B H

Control Break

INT 1C H

Timer Tick

INT 1D H

Video Parameter Table

INT 1E H

Disk Drive Parameter Table

INT 1F H

CGA Video Graphic Character Table

INT 20 H

Program Terminate

INT 21 H

Various DOS Function

INT 22 H

End Routine Pointer

INT 23 H

DOS Control - C

INT 24 H

Critical DOS Error

INT 25 H

DOS Absolute Disk Read

INT 26 H

DOS Absolute Disk Write

INT 27 H

Terminate and Stay Resident

INT 28 H

Reserved

INT 29 H

Reserved

INT 2A H

Reserved

INT 2B H

Reserved

INT 2C H

Reserved

INT 2D H

Reserved

INT 2E H

Reserved

INT 2F H

DOS Multiplex Function
INT 30 H ~ INT 3F H Reserved

INT 41 H

Reserved

INT 41 H

Fixed Disk Parameter Table

INT 42 H

Reserved

INT 43 H

EGA/VGA Video Graphic Character Table

INT 44 H ~ INT 5F H

Reserved

INT 60 H ~ INT 66 H

User

INT 67 H

LIM EMS Manager

INT 68 H ~ INT 7F H

Reserved (some used by slave PIC)

INT 80 H ~ INT 85 H

BASIC

INT 86 H ~ INT F0 H

BASIC Interpreter

INT F1 H ~ FF H

Reserved
Tabel F-1. Interrupt Vector Table for PC/XT/AT Computer.
 
 

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